Digital IC-design
Digital IC-konstruktion

ETIN20, 7.5 credits, A (Second Cycle)

Valid for: 2026/27
Faculty: Faculty of Engineering LTH
Decided by: PLED E
Date of Decision: 2026-04-09

General Information

Main field: Electronic Design Depth of study relative to the degree requirements: Second cycle, in-depth level of the course cannot be classified
Main field: Nanoscience Depth of study relative to the degree requirements: Second cycle, in-depth level of the course cannot be classified
Mandatory for: MSOC1
Elective for: D4, E4-he, E4-is, F4, F4-fel, N4-hn
Language of instruction: The course will be given in English

Aim

Digital IC Design is one, out of 5, courses in digital VLSI design. The course aims to give a thorough understanding for digital integrated circuit design. Increasing complexity and high requirements on performance in form of throughput and low power consumption will increase the expectations from the hardware designer. To understand the possibilities and limitations, and being able to estimate the achievable performance, is not only important for full custom designers. High level designers also need to be able to estimate the achievable performance for a given design at an early stage and make qualified design decisions based on this knowledge. The course will focus on CMOS design.

Learning outcomes

Knowledge and understanding
For a passing grade the student must

• be able to describe the parameters influencing the transistor's or digital circuit's physical characteristics, regarding area, power consumption, and delays.
• be able to design, analyze, and optimize individual CMOS gates and larger sequential nets, based on a given function, a layout, or a net of interconnecting wires, with a target performance goal in mind,
• be able to describe how arithmetic and combinational blocks are designed, based on elementary functions as well as apply these blocs in sequential nets,
• be able to use tools for layout, schematics and simulation for digital ASIC-design.

Competences and skills
For a passing grade the student must

• from a given problem, be able to apply his or her knowledge to analyze, simulate and design digital circuits in a computer based environment.

Judgement and approach
For a passing grade the student must

• be able to communicate results from laboratory experiments orally,
• have acquired knowledge enough to be able to discuss ideas, problems and solutions with competent digital designers, and
• be able to sort out important information independently, from an extensive material, such as a textbook and a manual.

Contents

The course content is centered around the design and analysis of CMOS gates, larger combinatorial nets, sequential nets, and the wires used to connect them. The course starts with a shorter introduction to the transistor and its properties. The design of gates, combinatorial nets, and the wire interconnects with focus on area, power, and timing performance, then follows. A central part of the course involves deriving simplified models for hand calculations of the achievable performance. These models are created to connect to properties that the designer has control over. Simulation tools will then be used to verify the limitations of these models.

Examination details

Grading scale: TH - (U, 3, 4, 5) - (Fail, Three, Four, Five)
Assessment:

Laboratory work and written examination.

The examiner, in consultation with Disability Support Services, may deviate from the regular form of examination in order to provide a permanently disabled student with a form of examination equivalent to that of a student without a disability.

Modules
Code: 0118. Name: Examination.
Credits: 6.0. Grading scale: TH - (U, 3, 4, 5). Assessment: Approved on written examination. The module includes: The whole course Further information: An approved voluntary lab and report will result in bonus points on the exam. The report quality determines the number of bonus points. The bonus points can only be used to reach the higher grades (4 or 5), not to pass the exam. The bonus points are only valid throughout the current academic year.
Code: 0218. Name: Laboratory Works.
Credits: 1.5. Grading scale: UG - (U, G). Assessment: Approved on laboratory works. The module includes: The whole course

Admission

Assumed prior knowledge: EIT020/EITF65 Design of Digital Circuits and ESS010/EITA35/ETIA01 Electronics or ETE115/EITF90 Electromagnetics and Electronics.
The number of participants is limited to: No
Kursen överlappar följande kurser: ETI130

Reading list

• Several options for the course literature are presented. It is not required to have access to them all.
• Weste, Neil H. E: CMOS VLSI design : a circuits and systems perspective. Boston : Addison Wesley, 2011, ISBN: 0321547748. This book can also be found as an E-book. There is also an international version of the book under a different name (Integrated Circuit Design).
• Rabaey, Jan M: Digital integrated circuits : a design perspective. Upper Saddle River, N.J. Prentice Hall, 2003, ISBN: 0130909963.
• Any additional material will be found at the course home page.

Contact

Course coordinator: Joachim Rodrigues, Joachim.Rodrigues@eit.lth.se
Teacher: Victor Åberg, victor.aberg@eit.lth.se
Course homepage: https://www.eit.lth.se/course/etin20

Further information

The laboratory work is done in CADENCE / Linux environment. During the laboratory works students are expected to master the basic UNIX commands. To get access to the design tools used in the course, the software and technology providers require students to sign a non-disclosure agreement.