Syllabus academic year 2007/2008

Higher education credits: 7,5. Grading scale: UG. Level: G2 (First level). Language of instruction: The course will be given in English. Compulsory for: MSOC1. Optional for: D4, D4dpd, E4dps. Course coordinator: Professor Lambert Spaanenburg,, Inst f informationsteknologi. Prerequisites: EIT020 Design of Digital Circuits---A Systems Approach. The course might be cancelled if the numer of applicants is less than 0. The number of participants is limited to 100 Assessment: Examination through approved labs followed by a successful final assignment. Further information: The course might be given in English. Home page:

General introduction to large-scale ASIC design with emphasis on FPGA implementation

· Efficient design-flow using modern CAD tools

· Design methodology for synchronous logic

· Modeling with synthesizable VHDL

· Rapid prototyping using FPGA

Knowledge and understanding
For a passing grade the student must

· Know how to perform synchronous design

· Be well-versed in conventional VHDL modeling

· Have tasted from the test, diagnose + repair cycle

Skills and abilities
For a passing grade the student must

· Be skilled in logic synthesis & physical mapping using state-of-the-art design tools

Judgement and approach
For a passing grade the student must

have a first “idea to product” experience

The course consists of the following four main parts: 1) Design flow based on modern design tools, 2) Use of VHDL as design language and input for logic synthesis, 3) Design of synchronous systems by developing clock cycle true models, 4) Use of field programmable gate arrays (FPGA) for rapid prototyping.
The course contains lectures, exercises, laboratories, and an assignment. The laboratory work is design oriented and based on the use of tools for simulation, synthesis, and optimisation with FPGA as the target technology. The assignment is a direct continuation of the laboratory work.

Reference Texts: Perry, D: VHDL, Mc. Graw-Hill, 3rd Edition, ISBN 0-07-049436-3. Navabi, Z: VHDL, Mc. Graw-Hill, 2nd Edition, ISBN 0-07-046479-0. V.A. Pedroni, VA: Circuit design with VHDL, MIT Press, ISBN 0-262-16224-5.
Course Notes: Lambert Spaanenburg Introduction to ASIC Design